This invention relates to the field of electronics, and in particular to a device that facilitates the interconnection of devices using an I2C interface.
The Inter Integrated Circuit (I2C) bus is an industry standard bus interface developed by Philips Corporation, which allows integrated circuits to communicate directly with each other via a simple bi-directional 2-wire bus. Interfacing devices in an I2C based system can be achieved by directly connecting them to the two bus lines: a serial data line (SDA) for the communication of data, and a serial clock line (SCL) for the control and synchronization of the communication of data between the devices.
FIG. 1 shows a block diagram of an I2C repeater 1 having one channel (SDA or SCL). In a typical I2C bus, another identical circuit as that in FIG. 1 is used for the other channel (SCL or SDA as the case may be). Repeater 1 is a device that allows separation of two I2C bus segments, segments A and B, by electrically isolating the two segments and repeating signals from one segment to the other. Each segment is of a wired-OR type. All devices on the bus are open-collector/open-drain devices and are only capable of driving the bus to a low state (about 0 volts). An external pull-up resistor pulls the bus high (about Vdd) when no device is driving it low. A main drawback with this type of repeater is that it can latch into a low state. For example, if segment A is driven low, repeater 1 will drive segment B low through buffer 10. This low on segment B caused by buffer 10 must not cause buffer 20 to drive segment A low; otherwise a latch condition will occur. Also, buffer 20 cannot be turned off because any device on segment B can drive segment B low, in which case buffer 20 must drive segment A low.
Therefore, there is a need for a scheme that can effectively determine whether a repeater buffer, e.g., buffer 10, is the only device driving a bus low, so as to prevent any latch condition.
The present invention provides an output driver circuit that can be used to determine whether a repeater buffer is the only device driving a bus low. According to the invention, the current through the output driver circuit is compared with a reference current. If that current is greater than the reference current, then the output driver circuit (and hence the repeater buffer) is the only output driving the bus low. On the other hand, if that current is less than the reference current, then the output driver circuit is not the only device driving the bus low. This information can be used in an I2C repeater to determine the proper response of the repeater and prevent a latch condition.
According to a first embodiment of the present invention, an output driver circuit for connecting to a bus is provided. The circuit comprises a first output driver connected to the bus; a second output driver for generating a reference current; and a comparator, connected to the first and second output drivers, for comparing current flowing through the first output driver with the reference current to determine whether there is an external device driving the bus.
According to one aspect of the first embodiment of the invention, the first output driver includes a first resistor and a first transistor, and the second output driver includes a second resistor and a second transistor.
According to another aspect of the first embodiment of the invention, the first resistor is slightly larger than the second resistor in value and the first and second transistor are substantially identical.
According to a second embodiment of the invention, an output driver circuit for connecting to a bus is provided. The circuit comprises a parallel circuit including first is and second paths, the first path for connecting to the bus; a transistor connected to the parallel circuit in series; and a comparator, connected to first and second paths, for comparing currents flowing through the two paths to determine whether there is an external device driving the bus.
According to one aspect of the second embodiment of the invention, the first path includes first and second resistors, and the second path includes third and fourth resistors.
According to another aspect of the second embodiment of the invention, the first path is a low impedance path, and the second path is a high impedance path. Furthermore, the first, second, third and fourth resistors are scaled such that, when there are no external devices driving the bus, the comparator detects a predetermined difference between the currents flowing through the two paths.
Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following description and claims taken in conjunction with the accompanying drawings.